US 12,443,521 B2
Decoding parameter updating method, memory storage device and memory control circuit unit
Yu-Hsiang Lin, Yunlin County (TW); and Bo Lun Huang, Tainan (TW)
Assigned to PHISON ELECTRONICS CORP., Miaoli (TW)
Filed by PHISON ELECTRONICS CORP., Miaoli (TW)
Filed on Feb. 16, 2024, as Appl. No. 18/443,304.
Claims priority of application No. 113102304 (TW), filed on Jan. 19, 2024.
Prior Publication US 2025/0238362 A1, Jul. 24, 2025
Int. Cl. G06F 12/02 (2006.01); G06F 3/06 (2006.01)
CPC G06F 12/0246 (2013.01) [G06F 3/0619 (2013.01); G06F 2212/7201 (2013.01)] 27 Claims
OG exemplary drawing
 
1. A decoding parameter updating method for a rewritable non-volatile memory module, wherein the rewritable non-volatile memory module comprises a plurality of physical units, and the decoding parameter updating method comprises:
sending at least one reading command sequence to the rewritable non-volatile memory module to instruct reading of first data from a first physical unit among the physical units based on a plurality of read voltage levels;
performing a logical operation on a first data group to obtain decoding index information corresponding to the first data group, wherein the first data group comprises the first data and second data read from at least one second physical unit among the physical units, and the decoding index information reflects a result of performing the logical operation on the first data and the second data;
obtaining error evaluation information corresponding to a first voltage interval among a plurality of voltage intervals according to the first data and the decoding index information, wherein the voltage intervals are defined by the read voltage levels, and the voltage intervals respectively correspond to a plurality of decoding parameters; and
updating a first decoding parameter corresponding to the first voltage interval among the decoding parameters according to the error evaluation information.