US 12,443,484 B2
Apparatuses and methods for variable input ECC circuits
Sujeet Ayyapureddi, Boise, ID (US)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on Feb. 16, 2024, as Appl. No. 18/444,482.
Claims priority of provisional application 63/487,162, filed on Feb. 27, 2023.
Prior Publication US 2024/0289217 A1, Aug. 29, 2024
Int. Cl. G06F 11/10 (2006.01)
CPC G06F 11/1068 (2013.01) [G06F 11/1016 (2013.01); G06F 11/1048 (2013.01)] 19 Claims
OG exemplary drawing
 
1. An apparatus comprising:
an error correction code (ECC) input circuit configured to receive a first number of bits of information and provide a second number of input bits, wherein the second number of input bits includes the first number of bits of information, wherein the first number varies based on an operational mode of the apparatus, and wherein the second number is a fixed value; and
an ECC engine configured to generate parity bits based on the second number of input bits as part of a write operation.