US 12,443,443 B2
Workload scheduler for memory allocation
Yipeng Wang, Portland, OR (US); Ren Wang, Portland, OR (US); Tsung-Yuan C. Tai, Portland, OR (US); Yifan Yuan, Champaign, IL (US); Pravin Pathak, Bridgewater, NJ (US); Sundar Vedantham, Allentown, PA (US); and Chris MacNamara, Limerick (IE)
Assigned to SK Hynix NAND Product Solutions Corp., Rancho Cordova, CA (US)
Filed by SK Hynix NAND Product Solutions Corp., Rancho Cordova, CA (US)
Filed on Feb. 24, 2020, as Appl. No. 16/799,745.
Prior Publication US 2020/0192715 A1, Jun. 18, 2020
Int. Cl. G06F 9/50 (2006.01); G06F 12/02 (2006.01); G06F 12/0862 (2016.01)
CPC G06F 9/5016 (2013.01) [G06F 12/023 (2013.01); G06F 12/0253 (2013.01); G06F 12/0862 (2013.01); G06F 2212/1044 (2013.01); G06F 2212/602 (2013.01)] 14 Claims
OG exemplary drawing
 
1. An apparatus comprising:
an interface;
circuitry, coupled to the interface, the circuitry comprising a processor, the circuitry to:
cause pre-fetch of packet data and content associated with a workload to be stored in a cache accessible to the processor core based on a position of an identifier of the workload in a work queue associated with the processor, wherein the pre-fetch of the packet data causes copying of the packet data into the cache before processing of the packet data by the workload, wherein the pre-fetch of the content causes copying of: a software environment to process the packet data, cryptographic keys used to process the packet data, and instructions executed to process the packet data, and wherein the packet data associated with the workload includes packet payload and packet connection context; and
a second circuitry to determine whether to permit eviction or not permit eviction of the pre-fetched packet data in the cache based at least in part on a position of the identifier of the workload in the work queue.