US 12,443,345 B2
Multi-level data storage device and operation method thereof
Kyoungho Koo, Daejeon (KR); and Youjip Won, Daejeon (KR)
Assigned to SK hynix Inc., Icheon (KR); and Korea Advanced Institute of Science and Technology, Daejeon (KR)
Filed by SK hynix Inc., Icheon (KR); and Korea Advanced Institute of Science and Technology, Daejeon (KR)
Filed on Aug. 22, 2023, as Appl. No. 18/453,967.
Claims priority of application No. 10-2022-0174131 (KR), filed on Dec. 13, 2022; and application No. 10-2023-0098624 (KR), filed on Jul. 28, 2023.
Prior Publication US 2024/0192853 A1, Jun. 13, 2024
Int. Cl. G06F 3/06 (2006.01)
CPC G06F 3/061 (2013.01) [G06F 3/0653 (2013.01); G06F 3/0673 (2013.01); G06F 2212/7208 (2013.01)] 11 Claims
OG exemplary drawing
 
1. A multi-level data storage device comprising:
a first storage device;
a second storage device located at a lower level than the first storage device;
an input/output (I/O) control circuit configured to control a first write operation for the first storage device and a second write operation for the second storage device; and
an imbalance control circuit configured to calculate an imbalance index corresponding to a write set that is generated when a sum of a number of first write operations and a number of second write operations becomes a predetermined number, and configured to control the I/O control circuit to control imbalance of write operations performed in the multi-level data storage device by controlling the first write operation or the second write operation based on the imbalance index,
wherein the imbalance control circuit calculates the imbalance index by dividing an average latency of the second write operations included in the write set by an average latency of the first write operations included in the write set, and
wherein, when the write set is a first write set, the imbalance control circuit controls the I/O control circuit to reduce an imbalance index for a second write set when the imbalance index for the first write set indicates an imbalance state, the second write set being generated to follow the first write set.