US 12,443,258 B2
Activity smoothener circuit controlling rates of change of localized processing activity in an integrated circuit (IC), and related methods
Smitha L. Rapaka, San Jose, CA (US); Derek E. Gladding, Poughquag, NY (US); and Xiaoling Xu, Cupertino, CA (US)
Assigned to Microsoft Technology Licensing, LLC, Redmond, WA (US)
Filed by Microsoft Technology Licensing, LLC, Redmond, WA (US)
Filed on Mar. 20, 2024, as Appl. No. 18/611,064.
Application 18/611,064 is a continuation of application No. 17/182,982, filed on Feb. 23, 2021, granted, now 11,960,338.
Prior Publication US 2024/0310891 A1, Sep. 19, 2024
This patent is subject to a terminal disclaimer.
Int. Cl. G06F 1/28 (2006.01); G06F 1/30 (2006.01); G06F 1/32 (2019.01); G06F 9/48 (2006.01); G06F 1/329 (2019.01)
CPC G06F 1/28 (2013.01) [G06F 1/305 (2013.01); G06F 9/4893 (2013.01); G06F 1/329 (2013.01); Y02D 10/00 (2018.01)] 16 Claims
OG exemplary drawing
 
1. An activity smoothener circuit in an integrated circuit (IC), the activity smoothener circuit comprising:
a plurality of circuit blocks (tiles) each comprising an execution circuit, each of the plurality of tiles configured to:
generate a first indication of desired activity of the tile, comprising a single-bit signal indicating a request for one of inactivity and activity in the execution circuit;
receive a first indication of actual activity for the tile, comprising a multi-bit signal representing an allowed level of activity; and
control task execution activity in the execution circuit of the tile according to the first indication of actual activity indicated by the received first indication of actual activity for the tile; and
a plurality of smoothening circuits, each corresponding to a cluster of the plurality of tiles, each of the plurality of smoothening circuits configured to:
receive the first indications of desired activity from each of the plurality of tiles;
generate a second indication of desired activity in the cluster, comprising a multi-bit signal indicating a requested level of activity in the cluster based on the first indications of desired activity in the plurality of tiles;
receive a second indication of actual activity for the cluster as a multi-bit signal representing an allowed level of activity for the cluster; and
generate the first indications of actual activity for each of the plurality of tiles based on the first indications of desired activity in the plurality of tiles, the second indication of actual activity in the cluster, and a first limit of a rate of change of current in each of the plurality of tiles of the IC.