US 12,443,212 B2
Band-gap reference source circuit and electronic apparatus
Chifeng Liu, Guangzhou (CN); Yongxiang Li, Guangzhou (CN); and Xin Zhang, Guangzhou (CN)
Assigned to SMARTER MICROELECTRONICS (GUANG ZHOU) CO., LTD., Guangzhou (CN)
Filed by SMARTER MICROELECTRONICS (GUANG ZHOU) CO., LTD., Guangzhou (CN)
Filed on Sep. 14, 2023, as Appl. No. 18/467,002.
Application 18/467,002 is a continuation of application No. PCT/CN2022/114016, filed on Aug. 22, 2022.
Claims priority of application No. 202110961567.5 (CN), filed on Aug. 20, 2021.
Prior Publication US 2023/0418317 A1, Dec. 28, 2023
Int. Cl. G05F 3/24 (2006.01); G05F 3/30 (2006.01)
CPC G05F 3/24 (2013.01) [G05F 3/30 (2013.01)] 10 Claims
OG exemplary drawing
 
1. A band-gap reference source circuit, configured to be connected with an electronic device, comprising: a power supply, a starting circuit, a core circuit, an output circuit and a shunt circuit, wherein,
the power supply is connected with first ends of the starting circuit, the core circuit and the output circuit, respectively, for feeding power;
a second end of the starting circuit is connected with the core circuit for providing a starting signal to the core circuit;
a second end of the core circuit is connected with the output circuit, and a control end of the core circuit is connected with the shunt circuit, for providing a control signal to the shunt circuit;
an output end of the output circuit is configured to be connected with the electronic device, and the output circuit provides a voltage and/or a current based on the core circuit; and
a first end of the shunt circuit is connected with the output end of the output circuit, and a current of a second end is controlled based on the control signal to shunt the output circuit;
wherein the shunt circuit comprises a shunt MOS transistor; and
a first end of the shunt MOS transistor is connected with the output end of the output circuit, a second end of the shunt MOS transistor is connected with a control node of the control end of the core circuit, and a third end of the shunt MOS transistor is connected with a ground wire;
wherein the shunt MOS transistor comprises a second MOS transistor and a third MOS transistor; the second MOS transistor is an N-type MOS transistor and the third MOS transistor is a P-type MOS transistor; a drain of the second MOS transistor is connected with the output end of the output circuit, a gate of the second MOS transistor is connected with a first node of the core circuit, a source of the second MOS transistor is connected with a source of the third MOS transistor, and a gate of the third MOS transistor is connected with a second node of the core circuit; and
the core circuit transmits a first voltage difference signal to the gate of the second MOS transistor through the first node, and the core circuit transmits a second voltage difference signal to the gate of the third MOS transistor through the second node; the second MOS transistor and the third MOS transistor are turned on under an action of the first voltage difference signal and the second voltage difference signal.