US 12,443,087 B2
Electrophoresis display with double-side control circuit substrate
Hsiang-Yu Lee, New Taipei (TW); Shang Chin, New Taipei (TW); Ping-Tsun Lin, New Taipei (TW); Chia-Cheng Lei, New Taipei (TW); and Kun-Yu Chen, New Taipei (TW)
Assigned to SUPERC-TOUCH CORPORATION, New Taipei (TW)
Filed by SUPERC-TOUCH CORPORATION, New Taipei (TW)
Filed on Sep. 13, 2024, as Appl. No. 18/885,320.
Claims priority of application No. 112135050 (TW), filed on Sep. 14, 2023.
Prior Publication US 2025/0093729 A1, Mar. 20, 2025
Int. Cl. G09G 3/34 (2006.01); G02F 1/16755 (2019.01); G02F 1/1677 (2019.01); G02F 1/1685 (2019.01); G02F 1/1675 (2019.01)
CPC G02F 1/16755 (2019.01) [G02F 1/1677 (2019.01); G02F 1/1685 (2019.01); G02F 2001/1678 (2013.01); G09G 3/344 (2013.01)] 15 Claims
OG exemplary drawing
 
1. An electrophoresis display with a double-side control circuit substrate, comprising:
a first control substrate, comprising a first face and a second face;
a first driving circuit layer, arranged on the second face of the first control substrate and comprising a plurality of first thin film transistors, a plurality of first gate lines, and a plurality of first data lines, at least one of the first gate lines electrically connected to gate electrodes of the first thin film transistors, at least one of the first data lines electrically connected to drain electrodes or source electrodes of the first thin film transistors;
a first control electrode layer, arranged on a surface of the first driving circuit layer away from the first control substrate and comprising a plurality of first control electrodes, at least one of the first control electrodes electrically connected to the source electrode or the drain electrode of one of the thin film transistors;
a second control substrate, comprising a third face and a fourth face, wherein, the third face is oppositely disposed to the second face;
a second driving circuit layer, arranged on the third face of the second control substrate and comprising a plurality of second thin film transistors, a plurality of second gate lines, and a plurality of second data lines, at least one of the second gate lines electrically connected to the gate electrodes of the second thin film transistors, at least one of the second data lines electrically connected to the drain electrodes or source electrodes of the second thin film transistors;
a second control electrode layer, arranged on a surface of the second driving circuit layer away from the second control substrate and comprising a plurality of second control electrodes, at least one of the second control electrodes electrically connected to the source electrode or the drain electrode of one of the second thin film transistors;
a micro-partition structure, made of polymer materials, the micro-partition structures comprising a plurality of partition walls to define a chamber configured to fill with a colloidal solution;
a first color filter layer, disposed between the first driving circuit layer and the micro-partition structure; and
a second color filter layer, disposed between the second driving circuit layer and the micro-partition structure;
wherein, the micro-partition structure is arranged between the first control substrate and the second control substrate.