US 12,114,511 B2
Semiconductor device, integrated circuit and method of manufacturing the same
Hui-Hsien Wei, Taoyuan (TW); Yen-Chung Ho, Hsinchu (TW); Chia-Jung Yu, Hsinchu (TW); Yong-Jie Wu, Hsinchu (TW); and Pin-Cheng Hsu, Hsinchu County (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD., Hsinchu (TW)
Filed by TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD., Hsinchu (TW)
Filed on Aug. 31, 2021, as Appl. No. 17/462,577.
Prior Publication US 2023/0063125 A1, Mar. 2, 2023
Int. Cl. H01L 29/82 (2006.01); H10B 61/00 (2023.01); H10N 50/01 (2023.01); H10N 50/10 (2023.01); H10N 50/80 (2023.01)
CPC H10B 61/22 (2023.02) [H10N 50/01 (2023.02); H10N 50/10 (2023.02); H10N 50/80 (2023.02)] 20 Claims
OG exemplary drawing
 
1. A semiconductor device, comprising:
a substrate;
a thin-film transistor (TFT) disposed over the substrate, the TFT comprising:
a gate electrode;
a gate dielectric layer disposed over the gate electrode;
source/drain electrodes disposed above the gate electrode; and
an active layer disposed above the gate electrode;
a magnetoresistive random-access memory (MRAM) cell electrically coupled to the TFT; and
a protection layer disposed between the TFT and the MRAM cell and electrically connects the MRAM cell to the TFT, wherein the protection layer includes oxide semiconductor material.