US 12,114,489 B2
Vertical access line in a folded digitline sense amplifier
Anton P. Eppich, Boise, ID (US)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on Dec. 2, 2021, as Appl. No. 17/540,589.
Prior Publication US 2023/0180467 A1, Jun. 8, 2023
Int. Cl. G11C 7/00 (2006.01); G11C 5/06 (2006.01); G11C 11/4091 (2006.01); H10B 12/00 (2023.01)
CPC H10B 12/50 (2023.02) [G11C 5/063 (2013.01); G11C 11/4091 (2013.01)] 18 Claims
OG exemplary drawing
 
1. An apparatus, comprising:
an array of memory cells, wherein
the memory cells form active areas having adjacent access devices, each access device having a first source/drain region and a second source/drain region separated by a channel region and a gate opposing the channel region;
a pair of adjacent memory cells share a digitline contact at the respective second source/drain regions and each respective storage node of the pair of adjacent memory cells is coupled to the respective first source/drain regions; and
each gate is connected to vertically oriented access lines formed on opposing side of a depletion region to each access device;
a sense amplifier coupled to digitlines in the array according to a folded digitline sense amplifier architecture; and
an insulator material patterned between adjacent digitlines to isolate adjacent memory cells.