	US 12,114,437 B2
	Wiring structure, method for manufacturing same, and semiconductor package
Masaya Toba, Tokyo (JP); and Kazuyuki Mitsukura, Tokyo (JP)
Assigned to RESONAC CORPORATION, Tokyo (JP)
Appl. No. 17/926,710
Filed by Showa Denko Materials Co., Ltd., Tokyo (JP)
PCT Filed Jun. 23, 2021, PCT No. PCT/JP2021/023799 § 371(c)(1), (2) Date Nov. 21, 2022, PCT Pub. No. WO2021/261525, PCT Pub. Date Dec. 30, 2021.
Claims priority of application No. 2020-108669 (JP), filed on Jun. 24, 2020; and application No. 2020-108697 (JP), filed on Jun. 24, 2020.
Prior Publication US 2023/0209725 A1, Jun. 29, 2023
Int. Cl. H05K 3/38 (2006.01); H01L 21/48 (2006.01); H01L 23/498 (2006.01); H05K 1/09 (2006.01); H05K 3/18 (2006.01); H05K 3/46 (2006.01)

CPC H05K 3/381 (2013.01) [H01L 21/486 (2013.01); H01L 23/49838 (2013.01); H05K 1/09 (2013.01); H05K 3/18 (2013.01); H05K 3/4644 (2013.01); H05K 2201/032 (2013.01); H05K 2203/0723 (2013.01)]

9 Claims

1. A wiring structure, comprising: an insulating resin layer; a seed layer provided on the insulating resin layer and including one or more metal layers; and a copper wiring provided on the seed layer, wherein a modified region including pores is formed in a surface layer of the insulating resin layer on the seed layer side, and a part of metal forming the seed layer penetrates into the pores, and wherein the surface of the insulating resin layer including the modified region has a surface roughness Ra of 70 nm or less.