US 12,114,340 B2
Apparatus and method for monitoring for a control signal in a resource block
Mostafa Khoshnevisan, San Diego, CA (US); Yitao Chen, San Diego, CA (US); Xiaoxia Zhang, San Diego, CA (US); Jing Sun, San Diego, CA (US); and Tao Luo, San Diego, CA (US)
Assigned to QUALCOMM Incorporated, San Diego, CA (US)
Filed by QUALCOMM Incorporated, San Diego, CA (US)
Filed on May 6, 2021, as Appl. No. 17/313,499.
Claims priority of provisional application 63/032,496, filed on May 29, 2020.
Prior Publication US 2021/0377951 A1, Dec. 2, 2021
Int. Cl. H04W 72/53 (2023.01); H04L 5/00 (2006.01); H04W 24/08 (2009.01); H04W 48/12 (2009.01); H04W 72/0453 (2023.01); H04W 72/23 (2023.01)
CPC H04W 72/53 (2023.01) [H04L 5/0053 (2013.01); H04L 5/0094 (2013.01); H04W 24/08 (2013.01); H04W 48/12 (2013.01); H04W 72/0453 (2013.01); H04W 72/23 (2023.01)] 16 Claims
OG exemplary drawing
 
9. A method of wireless communication performed by a user equipment (UE), comprising:
receiving a configuration for a control resource set (CORESET) having a first resource block (RB) set associated with a first transmission configuration indicator (TCI) state and a second RB set associated with a second TCI state, wherein a first set of frequency domain resources for the first RB set and a second set of frequency domain resources for the second RB set are configured in a common bitmap, wherein the first set of frequency domain resources and the second set of frequency domain resources are based on the common bitmap and a rule that indicates a pattern, and wherein the configuration includes an indication of the pattern;
receiving a search space set (SSS) configuration associated with at least one of the first RB set and the second RB set of the CORESET, wherein the SSS configuration is associated with multiple RB sets of the CORESET, and wherein a number of control channel elements (CCEs) for a physical downlink control channel (PDCCH) candidate is a multiple of a configured aggregation level (AL);
determining a first set of CCE indices for the first RB set and a second set of CCE indices for the second RB set;
receiving configuration information indicating whether a number of coded bits of the PDCCH candidate is based on CCEs in a single RB set or based on a combined set of CCEs in the first RB set and the second RB set; and
monitoring for a control signal in the first RB set and the second RB set.