CPC H04N 19/70 (2014.11) [H04N 19/184 (2014.11); H04N 19/1883 (2014.11); H04N 19/46 (2014.11)] | 4 Claims |
1. A device comprising one or more processors configured to:
receive a general constraints information syntax structure;
parse an 8-bit syntax element in the general constraints information syntax structure, wherein the 8-bit syntax element specifies a number of additional general constraints information flags in the general constraints information syntax structure;
parse the additional general constraints information flags in the general constraints information syntax structure, in a case that a value of the 8-bit syntax element is greater than a predetermined value; and
parse a reserved bits syntax element in the general constraints information syntax structure based on the value of the 8-bit syntax element.
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