US 12,113,946 B2
Buffer management for plug-in architectures in computation graph structures
Radhakrishna Giduthuri, Campbell, CA (US); and Michael L. Schmit, Santa Clara, CA (US)
Assigned to Advanced Micro Devices, Inc., Santa Clara, CA (US)
Filed by Advanced Micro Devices, Inc., Santa Clara, CA (US)
Filed on Aug. 29, 2022, as Appl. No. 17/897,521.
Application 17/897,521 is a continuation of application No. 16/925,911, filed on Jul. 10, 2020, granted, now 11,431,872.
Application 16/925,911 is a continuation of application No. 15/663,516, filed on Jul. 28, 2017, granted, now 10,742,834, issued on Aug. 11, 2020.
Prior Publication US 2022/0417382 A1, Dec. 29, 2022
Int. Cl. H04N 1/21 (2006.01); G06F 9/445 (2018.01); G06T 1/20 (2006.01); G06T 1/60 (2006.01); H04N 101/00 (2006.01)
CPC H04N 1/2141 (2013.01) [G06F 9/44526 (2013.01); G06T 1/20 (2013.01); G06T 1/60 (2013.01); H04N 2101/00 (2013.01); H04N 2201/0084 (2013.01); H04N 2201/0087 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A computer vision processing system comprising:
a plurality of image capture devices;
a computing device, in communication with the image capture devices, the computing device comprising:
memory comprising an input buffer allocated by an input plug-in for storing a frame of captured image data and an output buffer allocated by an output plug-in for storing processed data; and
a processor configured to:
execute a first set of operations on the captured image data from the input buffer and store processed data in the output buffer;
return the input buffer to the input plug-in in response to completing execution of the first set of operations;
execute a second set of operations on the processed data stored in the output buffer;
return the output buffer to the output plug-in and output the processed data from the output buffer in response to completing execution of the second set of operations.