US 12,113,896 B1
End-to-end hardware acceleration for ZKP from witness generation to proof generation
Patrick Xu, Saratoga, CA (US); Minglei Wang, Sunnyvale, CA (US); Sidong Li, Saratoga, CA (US); De Vu, Livermore, CA (US); Saptadeep Pal, Cupertino, CA (US); and Lei Chang, Saratoga, CA (US)
Assigned to Auradine, Inc., Santa Clara, CA (US)
Filed by Auradine, Inc., Santa Clara, CA (US)
Filed on Nov. 30, 2023, as Appl. No. 18/525,604.
Application 18/525,604 is a continuation of application No. 18/214,462, filed on Jun. 26, 2023, granted, now 11,882,216.
Application 18/214,462 is a continuation of application No. 18/207,620, filed on Jun. 8, 2023.
This patent is subject to a terminal disclaimer.
Int. Cl. H04L 9/08 (2006.01)
CPC H04L 9/088 (2013.01) 21 Claims
OG exemplary drawing
 
1. A proving computing system comprising:
a host processor;
a cryptographic engine that includes a witness generator, a proof generator and a local witness buffer on a semiconductor device, the cryptographic engine is separate from the host processor wherein the local witness buffer in the cryptographic engine is separate from host memory accessed by the host processor;
wherein the witness generator in the cryptographic engine (a) receives, from the host processor, compiled code of a cryptographic program and specific input to the cryptographic program, (b) executes the cryptographic program by way of executing the compiled code, (c) records specific output generated from the cryptographic program, intermediate variable values, and the specific input, as a specific witness of executing the cryptographic program, and (d) stores the specific witness in the local witness buffer in the cryptographic engine;
wherein the specific witness has a data size exceeding a maximum supported memory access bandwidth of the host memory for a single clock cycle;
wherein the proof generator in the cryptographic engine (e) receives, from the host processor, a proving key that was generated along with a verification key, (f) accesses the specific witness in the local witness buffer in the cryptographic engine, wherein the specific witness is accessed in its entirety by the proof generator over first clock cycles fewer than second clock cycles over which the host memory stored data of the same data size is accessed from the host memory and (g) generates a specific proof for executing the cryptographic program with a combination of the proving key, the specific witness and the specific input;
wherein a recipient computing system that receives the verification key and the specific proof validates the specific proof with the verification key.