US 12,113,551 B2
Calibration of anti-aliasing filter mismatch
Arashk Norouzpourshirazi, Austin, TX (US); John L. Melanson, Austin, TX (US); and Axel Thomsen, Austin, TX (US)
Assigned to Cirrus Logic Inc., Austin, TX (US)
Filed by Cirrus Logic International Semiconductor Ltd., Edinburgh (GB)
Filed on Aug. 25, 2022, as Appl. No. 17/895,897.
Prior Publication US 2024/0072823 A1, Feb. 29, 2024
Int. Cl. H03M 3/00 (2006.01); H03F 3/217 (2006.01)
CPC H03M 3/38 (2013.01) [H03M 3/344 (2013.01); H03M 3/458 (2013.01); H03F 3/217 (2013.01)] 16 Claims
OG exemplary drawing
 
1. A method comprising, in a system comprising a differential filter comprising a plurality of impedance elements:
applying a common-mode signal to the differential filter;
measuring an output signal of the differential filter in response to the common-mode signal to determine an error due to impedance mismatch of the impedance elements; and
tuning one or more of the plurality of impedance elements to minimize the error.