US 12,113,544 B2
Single-ended to differential-ended converter circuit, successive-approximation register analog-to-digital converter utilizing same, and method of converting single-ended signal to differential-ended signal
Sheng-Yen Shih, Hsinchu (TW); Shih-Hsiung Huang, Hsinchu (TW); and Wei-Cian Hong, Hsinchu (TW)
Assigned to REALTEK SEMICONDUCTOR CORPORATION, Hsinchu (TW)
Filed by REALTEK SEMICONDUCTOR CORPORATION, Hsinchu (TW)
Filed on Jul. 14, 2022, as Appl. No. 17/864,464.
Claims priority of application No. 110140917 (TW), filed on Nov. 3, 2021.
Prior Publication US 2023/0134950 A1, May 4, 2023
Int. Cl. H03M 1/00 (2006.01); H03M 1/12 (2006.01); H03M 1/38 (2006.01); H03M 3/04 (2006.01)
CPC H03M 1/38 (2013.01) [H03M 1/1245 (2013.01); H03M 3/04 (2013.01)] 11 Claims
OG exemplary drawing
 
1. A single-ended to differential-ended converter circuit for receiving a single-ended signal and outputting a differential signal at a first output node and a second output node, comprising:
a first sampling capacitor having a first end and a second end, the first end being coupled to the first output node, and the second end receiving a reference voltage;
a second sampling capacitor having a third end and a fourth end, the third end being coupled to the second output node;
a switch group coupled to the first output node, the second output node, and the fourth end; and
a logic circuit coupled to the switch group and configured to control the switch group according to a clock;
wherein at a first time point, the switch group couples the first output node and the first end to the single-ended signal, couples the second output node and the third end to the reference voltage or a middle voltage value of a swing of the single-ended signal, and couples the fourth end to the single-ended signal;
wherein at a second time point, the switch group couples the fourth end to the reference voltage; and
wherein the differential signal is outputted after the second time point which is later than the first time point;
wherein the first time point corresponds to one of a rising edge and a falling edge of the clock, and the second time point corresponds to another of the rising edge and the falling edge of the clock.