US 12,113,542 B2
Calibration detector with two offset compensation loops
Jan Mulder, Houten (NL); Frank Van der Goes, Zeist (NL); Mohammadreza Mehrpoo, Eindhoven (NL); Sijia Wang, Utrecht (NL); and Jeffrey Allan Riley, Utrecht (NL)
Assigned to Avago Technologies International Sales Pte. Limited, Singapore (SG)
Filed by AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED, Singapore (SG)
Filed on Aug. 19, 2022, as Appl. No. 17/892,001.
Prior Publication US 2024/0063808 A1, Feb. 22, 2024
Int. Cl. H03M 1/10 (2006.01)
CPC H03M 1/1023 (2013.01) 17 Claims
OG exemplary drawing
 
1. A calibration system for a circuit in an integrated circuit package, the circuit comprising a plurality of cells, the calibration system comprising:
a chopper circuit configured to receive a first signal from a first cell of the plurality of cells and a second signal from a second cell of the plurality of cells;
a comparator circuit configured to:
receive the first signal and the second signal from the chopper circuit; and
provide a third signal indicating at least one of the first signal or the second signal for use in calibration; and
a compensation circuit configured to offset a first voltage associated with the comparator circuit and configured to offset a second voltage associated with the chopper circuit;
wherein the compensation circuit includes at least one digital to analog convertor cell and at least one chopper circuit.