US 12,113,529 B2
Electronic device and memristor-based logic gate circuit thereof
Kang Su, Jiangsu (CN); Fen Guo, Jiangsu (CN); Hongtao Man, Jiangsu (CN); and Tuo Li, Jiangsu (CN)
Assigned to INSPUR SUZHOU INTELLIGENT TECHNOLOGY CO., LTD., Jiangsu (CN)
Appl. No. 18/694,941
Filed by SUZHOU METABRAIN INTELLIGENT TECHNOLOGY CO., LTD., Jiangsu (CN)
PCT Filed Sep. 28, 2022, PCT No. PCT/CN2022/122300
§ 371(c)(1), (2) Date Mar. 22, 2024,
PCT Pub. No. WO2023/155439, PCT Pub. Date Aug. 24, 2023.
Claims priority of application No. 202210148841.1 (CN), filed on Feb. 18, 2022.
Prior Publication US 2024/0275386 A1, Aug. 15, 2024
Int. Cl. H03K 19/20 (2006.01); G06F 7/501 (2006.01); H03K 19/02 (2006.01); H03K 19/21 (2006.01)
CPC H03K 19/02 (2013.01) [G06F 7/501 (2013.01); H03K 19/21 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A memristor-based logic gate circuit, comprising:
an AND logic gate based on a memristor-aided logic (MAGIC) auxiliary logic gate, used for realizing an operation of logic AND based on three first memristors connected in series within the AND logic gate;
a first power supply, used for outputting electric energy when the AND logic gate is in a steady state;
a second memristor having a first end connected to the first power supply, used for presenting a low-resistance state merely when the first power supply supplies power to itself; and
a controllable switch having a first end connected to a second end of the second memristor, a second end being grounded, and a control end connected to a negative end of the first memristor as an output memristor, wherein the controllable switch is used for conducting merely when two first memristors as input memristors in the AND logic gate present different resistance value states.