| CPC H03G 3/3068 (2013.01) [H03G 3/3036 (2013.01)] | 20 Claims |
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19. A power amplifier for a transmitter of a communication system, the power amplifier comprising:
a radio frequency (RF) signal path including:
a signal source configured to generate an RF signal;
a dual-mode analog variable gain attenuator (AVGA) electrically coupled to receive (i) the RF signal, (ii) an attenuation control signal, and (iii) a mode signal, the dual-mode AVGA being configured to attenuate the RF signal based on an attenuation value indicated by the attenuation control signal, the mode signal indicating a control mode to be used by the dual-mode AVGA to determine the attenuation value based on the attenuation control signal; and
an RF directional coupler electrically coupled to receive the RF signal from the dual-mode AVGA and to output an output RF signal and a coupled RF signal based on, the coupled RF signal being indicative of the output RF; and
a power control circuit including:
a square law power detector electrically coupled to receive (i) the coupled RF signal and (ii) a setpoint voltage signal and to generate a detector output signal based on the coupled RF signal and the setpoint voltage signal; and
a switch circuit electrically coupled to receive (i) the mode control signal, (ii) the detector output signal, and (iii) a voltage control signal,
wherein the mode signal has one of a first value indicating an open-loop automatic gain control (AGC) mode of operation for the power control circuit and a second value indicating an automatic level control (ALC) mode of operation for the power control circuit,
wherein, when the power control circuit is operated in the AGC mode, the voltage control signal corresponds to an AGC control voltage,
wherein, when the power control circuit is operated in the ALC mode, the voltage control signal corresponds to an ALC reference voltage,
wherein, in response to the mode control signal having the first value, the switch circuit supplies the AGC control voltage to the dual-mode AVGA as the attenuation control signal,
wherein, in response to the mode control signal having the second value, the switching circuit supplies the ALC reference voltage to the square law power detector as the setpoint voltage signal and supplies the detector output signal to the dual-mode AVGA as the attenuation control signal, and
wherein, when the setpoint voltage signal corresponds to the ALC reference voltage, the square law power detector is configured to generate the detector output signal such that the detector output signal has a voltage indicative of the attenuation value required to bring the output RF signal in line with the ALC reference voltage.
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