US 12,113,135 B2
Transistor and method for manufacturing the same
Yu-Chu Lin, Tainan (TW); Wen-Chih Chiang, Hsinchu (TW); Chi-Chung Jen, Kaohsiung (TW); Ming-Hong Su, Tainan (TW); Mei-Chen Su, Kaohsiung (TW); Chia-Wei Lee, Kaohsiung (TW); Kuan-Wei Su, Kaohsiung (TW); and Chia-Ming Pan, Tainan (TW)
Assigned to Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed on Feb. 27, 2023, as Appl. No. 18/174,687.
Application 18/174,687 is a division of application No. 17/446,556, filed on Aug. 31, 2021, granted, now 11,594,645.
Prior Publication US 2023/0223480 A1, Jul. 13, 2023
Int. Cl. H01L 29/788 (2006.01); H01L 29/06 (2006.01); H01L 29/423 (2006.01); H10B 41/00 (2023.01)
CPC H01L 29/788 (2013.01) [H01L 29/0649 (2013.01); H01L 29/42324 (2013.01); H10B 41/00 (2023.02)] 20 Claims
OG exemplary drawing
 
1. A method, comprising:
forming a first conductive structure, having a first curved side surface, on a substrate;
depositing a dielectric structure on the first conductive structure; and
forming a second conductive structure, having a second curved side surface, on an isolation structure in the substrate,
wherein the dielectric structure is disposed between the first curved side surface and the second curved side surface.