US 12,113,126 B2
Semiconductor device
Kaori Fuse, Yokohama Kanagawa (JP); Keiko Kawamura, Yokohama Kanagawa (JP); Takako Motai, Yokohama Kanagawa (JP); Tomoko Matsudai, Tokyo (JP); and Yoko Iwakaji, Tokyo (JP)
Assigned to Kabushiki Kaisha Toshiba, Tokyo (JP); and Toshiba Electronic Devices & Storage Corporation, Tokyo (JP)
Filed by KABUSHIKI KAISHA TOSHIBA, Tokyo (JP); and TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION, Tokyo (JP)
Filed on Mar. 4, 2022, as Appl. No. 17/686,809.
Claims priority of application No. 2021-154468 (JP), filed on Sep. 22, 2021.
Prior Publication US 2023/0086935 A1, Mar. 23, 2023
Int. Cl. H01L 29/739 (2006.01); H01L 29/868 (2006.01)
CPC H01L 29/7397 (2013.01) [H01L 29/868 (2013.01)] 16 Claims
OG exemplary drawing
 
1. A semiconductor device, comprising:
a first electrode;
a first semiconductor layer of first conductivity type provided on the first electrode;
a second semiconductor layer of second conductivity type provided on the first semiconductor layer;
a second electrode provided on the second semiconductor layer;
a first trench reaching the first semiconductor layer from the second semiconductor layer;
a first semiconductor region provided in the second semiconductor layer, the first semiconductor region being in contact with the first trench and the first semiconductor region having a higher concentration of impurities of second conductivity type than the second semiconductor layer; and
a first insulating film provided in the second semiconductor layer and the first insulating film being in contact with the first semiconductor region.