US 12,113,076 B2
Method for manufacturing display substrate, display substrate and display device
Liang Chen, Beijing (CN); Jincheng Gao, Beijing (CN); Haijiao Qian, Beijing (CN); Tao Jiang, Beijing (CN); Zexu Liu, Beijing (CN); Tao Wang, Beijing (CN); Lixing Zhao, Beijing (CN); Guanyong Zhang, Beijing (CN); Quanzhou Liu, Beijing (CN); and Jiantao Liu, Beijing (CN)
Assigned to HEFEI BOE DISPLAY TECHNOLOGY CO., LTD., Anhui (CN); and BOE TECHNOLOGY GROUP CO., LTD., Beijing (CN)
Filed by Hefei BOE Display Technology Co., Ltd., Anhui (CN); and BOE TECHNOLOGY GROUP CO., LTD., Beijing (CN)
Filed on Oct. 29, 2021, as Appl. No. 17/514,265.
Claims priority of application No. 202110298554.4 (CN), filed on Mar. 19, 2021.
Prior Publication US 2022/0302180 A1, Sep. 22, 2022
Int. Cl. H01L 27/12 (2006.01); H01L 21/311 (2006.01)
CPC H01L 27/1248 (2013.01) [H01L 21/31116 (2013.01); H01L 21/31138 (2013.01); H01L 27/1262 (2013.01); H01L 27/124 (2013.01)] 9 Claims
OG exemplary drawing
 
1. A method for manufacturing a display substrate, comprising:
forming a thin film transistor structure on a base substrate, the thin film transistor structure comprising a gate metal layer, a first insulating layer, and a source-drain metal layer;
forming a second insulating layer on a side of the thin film transistor structure facing away the base substrate;
forming a color resist layer and a third insulating layer successively on a side of the second insulating layer facing away the base substrate, the third insulating layer comprising a first via hole and a second via hole, wherein the first via hole penetrates the third insulating layer so that a material of the color resist layer is comprised between a bottom of the first via hole and the second insulating layer, and an orthographic projection of the first via hole on the base substrate at least partially overlaps an orthographic projection of the source-drain metal layer on the base substrate, the second via hole penetrates the third insulating layer and the color resist layer to expose a part of the second insulating layer, and an orthographic projection of the second via hole on the base substrate at least partially overlaps an orthographic projection of the gate metal layer on the base substrate; and
performing an etching process in the first via hole and the second via hole, so that the first via hole penetrates the color resist layer and the second insulating layer, and extends to the source-drain metal layer to expose at least a part of the source-drain metal layer, and the second via hole extends to the gate metal layer to expose at least a part of the gate metal layer.
 
7. A method for manufacturing a display substrate, comprising:
forming a thin film transistor structure on a base substrate, the thin film transistor structure comprising a gate metal layer, a first insulating layer, and a source-drain metal layer;
forming a second insulating layer on a side of the thin film transistor structure facing away the base substrate;
forming a color resist layer and a third insulating layer successively on a side of the second insulating layer facing away the base substrate, the third insulating layer comprising a first via hole and a second via hole, wherein the first via hole does not penetrates the third insulating layer so that a material of the third insulating layer is comprised between a bottom of the first via hole and the second insulating layer, and an orthographic projection of the first via hole on the base substrate at least partially overlaps an orthographic projection of the source-drain metal layer on the base substrate, the second via hole penetrates the third insulating layer and the color resist layer to expose a part of the second insulating layer, and an orthographic projection of the second via hole on the base substrate at least partially overlaps an orthographic projection of the gate metal layer on the base substrate; and
performing an etching process in the first via hole and the second via hole, so that the first via hole penetrates the third insulating layer and the second insulating layer, and extends to the source-drain metal layer to expose at least a part of the source-drain metal layer, and the second via hole extends to the gate metal layer to expose at least a part of the gate metal layer.