US 12,113,035 B2
Semiconductor device and method for fabricating thereof
Jin-Su Lee, Hwaseong-si (KR); Hong Sik Chae, Hwaseong-si (KR); Youn Soo Kim, Yongin-si (KR); Tae Kyun Kim, Suwon-si (KR); and Youn Joung Cho, Hwaseong-si (KR)
Assigned to Samsung Electronics Co., Ltd., Gyeonggi-do (KR)
Filed by Samsung Electronics Co., Ltd., Suwon-si (KR)
Filed on Nov. 1, 2023, as Appl. No. 18/499,527.
Application 18/499,527 is a continuation of application No. 17/470,370, filed on Sep. 9, 2021, granted, now 11,848,287.
Claims priority of application No. 10-2020-0122727 (KR), filed on Sep. 23, 2020.
Prior Publication US 2024/0079355 A1, Mar. 7, 2024
Int. Cl. H01L 23/64 (2006.01); H10B 12/00 (2023.01)
CPC H01L 23/642 (2013.01) [H10B 12/30 (2023.02)] 20 Claims
OG exemplary drawing
 
1. A method for fabricating a semiconductor device, the method comprising:
forming a mold structure by alternately stacking mold insulating layers and semiconductor patterns in a first direction, the mold structure including a plurality of pre side extension holes defined by the semiconductor patterns and adjacent mold insulating layers, the plurality of pre side extension holes extending in a second direction perpendicular to the first direction;
forming a seed metal film along profiles of each of the pre side extension holes using a reductant having a group IVA or a group IVB element as a central atom;
forming a plurality of silicide patterns, between the mold insulating layers through a silicidation process of the seed metal film and the semiconductor patterns; and
forming a metal conductive film in a remainder of the pre side extension holes, the metal conductive film connected to the plurality of silicide patterns.