US 12,113,018 B2
Semiconductor device
Dong Hyuk Kim, Icheon-si (KR); Sung Lae Oh, Icheon-si (KR); Tae Sung Park, Icheon-si (KR); and Soo Nam Jung, Icheon-si (KR)
Assigned to SK hynix inc., Icheon-si (KR)
Filed by SK hynix Inc., Icheon-si (KR)
Filed on Mar. 29, 2023, as Appl. No. 18/192,322.
Application 18/192,322 is a division of application No. 17/079,267, filed on Oct. 23, 2020, granted, now 11,646,265.
Claims priority of application No. 10-2020-0032053 (KR), filed on Mar. 16, 2020.
Prior Publication US 2023/0230920 A1, Jul. 20, 2023
Int. Cl. H01L 23/528 (2006.01); G11C 7/18 (2006.01); H01L 23/522 (2006.01); H01L 23/535 (2006.01); H10B 41/20 (2023.01); H10B 41/41 (2023.01); H10B 43/20 (2023.01); H10B 43/40 (2023.01)
CPC H01L 23/528 (2013.01) [G11C 7/18 (2013.01); H01L 23/5226 (2013.01); H01L 23/535 (2013.01); H10B 41/20 (2023.02); H10B 41/41 (2023.02); H10B 43/20 (2023.02); H10B 43/40 (2023.02)] 10 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
a first connection pattern;
a bit line disposed over the first connection pattern in a vertical direction; and
a bit-line contact pad, disposed in a first layer between the bit line and the first connection pattern to electrically couple the bit line to the first connection pattern, and formed as an island when viewed along the vertical direction,
wherein:
the bit-line contact pad is one of a first group of similar-shaped bit-line contact pads disposed at a predetermined distance between adjacent ones in a first direction, the first group comprising at least one bit-line contact pad deviating from the remaining bit-line contact pads in its position in a second direction.