US 12,113,014 B2
Integrated circuit including supervia and method of making
Kam-Tou Sio, Hsinchu (TW); Wei-Cheng Lin, Hsinchu (TW); and Jiann-Tyng Tzeng, Hsinchu (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed by TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed on Jul. 21, 2023, as Appl. No. 18/356,354.
Application 17/590,439 is a division of application No. 16/530,770, filed on Aug. 2, 2019, granted, now 11,270,936, issued on Mar. 8, 2022.
Application 18/356,354 is a continuation of application No. 17/590,439, filed on Feb. 1, 2022, granted, now 11,735,517.
Claims priority of provisional application 62/753,516, filed on Oct. 31, 2018.
Prior Publication US 2024/0021516 A1, Jan. 18, 2024
This patent is subject to a terminal disclaimer.
Int. Cl. H01L 23/522 (2006.01); H01L 21/768 (2006.01); H01L 23/528 (2006.01)
CPC H01L 23/5226 (2013.01) [H01L 21/76804 (2013.01); H01L 21/76877 (2013.01); H01L 23/528 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An integrated circuit comprising:
a substrate;
a first conductive line extending parallel to a top surface of the substrate, wherein the first conductive line is a first distance from the top surface of the substrate;
a second conductive line extending parallel to the top surface of the substrate, wherein the second conductive line is a second distance from the top surface of the substrate, and the second distance is different from the first distance;
a third conductive line extending parallel to the top surface of the substrate, wherein the third conductive line is a third distance from the top surface of the substrate, and the third distance is different from the second distance and the first distance; and
a supervia directly connected to the first conductive line and the third conductive line, wherein a first angle between a lower sidewall of a lower portion of the supervia and the top surface of the substrate is different from a second angle between an upper sidewall of an upper portion of the supervia and the top surface of the substrate.