US 12,113,010 B2
Plurality of bus bars intersecting a plurality electrode
Shigeto Fujita, Tokyo (JP); and Tetsuya Matsuda, Tokyo (JP)
Assigned to Mitsubishi Electric Corporation, Tokyo (JP)
Appl. No. 17/754,238
Filed by Mitsubishi Electric Corporation, Tokyo (JP)
PCT Filed Nov. 15, 2019, PCT No. PCT/JP2019/044893
§ 371(c)(1), (2) Date Mar. 28, 2022,
PCT Pub. No. WO2021/095239, PCT Pub. Date May 20, 2021.
Prior Publication US 2022/0375846 A1, Nov. 24, 2022
Int. Cl. H01L 23/50 (2006.01); H01L 21/56 (2006.01); H01L 23/00 (2006.01); H01L 23/31 (2006.01); H01L 25/065 (2023.01); H01L 25/07 (2006.01); H01L 25/075 (2006.01)
CPC H01L 23/50 (2013.01) [H01L 21/56 (2013.01); H01L 23/3107 (2013.01); H01L 24/37 (2013.01); H01L 24/40 (2013.01); H01L 24/83 (2013.01); H01L 24/97 (2013.01); H01L 25/0652 (2013.01); H01L 25/072 (2013.01); H01L 25/0753 (2013.01); H01L 2924/181 (2013.01)] 7 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
a plurality of semiconductor chips;
an insulating part surrounding the semiconductor chips;
a first electrode in pressure contact with the semiconductor chips;
a second electrode in pressure contact with the semiconductor chips, the semiconductor chips being sandwiched between the first electrode and the second electrode in a first direction;
a first bus bar connected to the first electrode; and
a second bus bar connected to the second electrode,
wherein the first bus bar and the second bus bar sandwich the insulating part in a second direction intersecting the first direction.