CPC H01L 21/76841 (2013.01) [H01L 21/823437 (2013.01); H01L 23/53223 (2013.01); H01L 29/2003 (2013.01); H01L 29/42372 (2013.01)] | 19 Claims |
1. A method of manufacturing an electrode structure for a device, comprising:
forming an insulating layer over a surface of a substrate;
forming an opening in the insulating layer to expose a semiconductor material surface region of the substrate through the opening;
depositing a barrier metal layer over the insulating layer and onto the semiconductor material surface region of the substrate through the opening in the insulating layer using atomic layer deposition;
depositing a conducting metal layer over the barrier metal layer;
depositing a cap metal layer over the conducting metal layer using sputtering;
forming a cap etch photoresist layer over a region of the cap metal layer; and
etching the cap metal layer, the conducting metal layer, and the barrier metal layer down to the insulating layer over an area outside of the cap etch photoresist layer.
|