US 12,112,965 B2
Wafer supporting mechanism and method for wafer dicing
Bo Hua Chen, Kaohsiung (TW); Yan Ting Shen, Kaohsiung (TW); Fu Tang Chu, Kaohsiung (TW); and Wen-Pin Huang, Kaohsiung (TW)
Assigned to ADVANCED SEMICONDUCTOR ENGINEERING, INC., Kaohsiung (TW)
Filed by Advanced Semiconductor Engineering, Inc., Kaohsiung (TW)
Filed on Feb. 21, 2023, as Appl. No. 18/112,466.
Application 18/112,466 is a continuation of application No. 17/060,003, filed on Sep. 30, 2020, granted, now 11,587,809.
Prior Publication US 2023/0197487 A1, Jun. 22, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. H01L 21/673 (2006.01); H01L 21/78 (2006.01); H01L 23/00 (2006.01)
CPC H01L 21/67346 (2013.01) [H01L 21/78 (2013.01); H01L 23/562 (2013.01)] 17 Claims
OG exemplary drawing
 
1. A wafer supporting mechanism, comprising:
a carrier configured to support a wafer carrying at least one semiconductor device on a first surface of the wafer; and
a cushion element configured to cover a portion of the wafer,
wherein the carrier comprises a base portion and a support portion protruded beyond a peripheral region of the base portion, and the base portion and the support portion collectively define an accommodation space for accommodating the cushion element and the at least one semiconductor device, and
wherein the cushion element is received within the accommodation space and configured to support the wafer to prevent warpage of the wafer during a wafer dicing process.