US 12,112,869 B2
Chip resistor
Soichi Sakakibara, Kyoto (JP); Takanori Shinoura, Kyoto (JP); and Wataru Imahashi, Kyoto (JP)
Assigned to ROHM CO., LTD., Kyoto (JP)
Appl. No. 17/773,720
Filed by ROHM CO., LTD., Kyoto (JP)
PCT Filed Oct. 29, 2020, PCT No. PCT/JP2020/040557
§ 371(c)(1), (2) Date May 2, 2022,
PCT Pub. No. WO2021/095535, PCT Pub. Date May 20, 2021.
Claims priority of application No. 2019-204582 (JP), filed on Nov. 12, 2019.
Prior Publication US 2022/0375657 A1, Nov. 24, 2022
Int. Cl. H01C 1/14 (2006.01); H01C 3/08 (2006.01); H05K 1/18 (2006.01)
CPC H01C 1/14 (2013.01) [H01C 3/08 (2013.01); H05K 1/181 (2013.01); H05K 2201/10022 (2013.01)] 17 Claims
OG exemplary drawing
 
1. A chip resistor, comprising:
a substrate including an upper surface, a back surface, and a side surface, the upper surface and the back surface intersecting a thickness-wise direction, and the side surface joining the upper surface and the back surface;
an upper electrode and a resistor body formed on the upper surface;
a back electrode formed on the back surface;
a side electrode formed on the side surface; and
a metal plating layer including a back plating layer covering at least a portion of the back electrode and a side plating layer covering at least a portion of the side electrode, wherein the metal plating layer has a thickness that is greater than or equal to 10 μm and less than or equal to 60 μm, wherein
the substrate includes a corner joining the back surface and the side surface,
the corner includes an inclined surface intersecting the back surface and the side surface, and
the metal plating layer includes a portion that covers the corner and is roundly curved.