US 12,112,812 B2
Non-volatile memory with early dummy word line ramp down after precharge
Jiacen Guo, Sunnyvale, CA (US); Dengtao Zhao, Los Gatos, CA (US); and Xiang Yang, Santa Clara, CA (US)
Assigned to SanDisk Technologies LLC, Austin, TX (US)
Filed by SanDisk Technologies LLC, Addison, TX (US)
Filed on Aug. 10, 2022, as Appl. No. 17/884,929.
Prior Publication US 2024/0055059 A1, Feb. 15, 2024
Int. Cl. G11C 16/04 (2006.01); G11C 16/10 (2006.01); G11C 16/34 (2006.01)
CPC G11C 16/3427 (2013.01) [G11C 16/0483 (2013.01); G11C 16/10 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A non-volatile storage apparatus, comprising:
a block of non-volatile memory cells arranged in a first sub-block and a second sub-block;
a first plurality of data word lines connected to non-volatile memory cells of the first sub-block without being connected to non-volatile memory cells of the second sub-block;
a second plurality of data word lines connected to non-volatile memory cells of the second sub-block without being connected to non-volatile memory cells of the first sub-block;
a first set of dummy memory cells positioned between the first sub-block and the second sub-block;
a first dummy word line connected to the first set of dummy memory cells and positioned between the first plurality of data word lines and the second plurality of data word lines; and
a control circuit connected to the non-volatile memory cells, the first plurality of data word lines, the second plurality of data word lines and the first dummy word line;
the control circuit is configured to program non-volatile memory cells of the second sub-block that are connected to a selected word line of the second plurality of data word lines by pre-charging channels of unselected non-volatile memory cells connected to the selected data word line, boosting the channels of unselected non-volatile memory cells connected to the selected data word line after the pre-charging and applying a program voltage pulse to selected non-volatile memory cells connected to the selected data word line while boosting;
the control circuit is configured to pre-charge channels of unselected non-volatile memory cells connected to the selected data word line by applying voltages to the first plurality of data word lines, the second plurality of data word lines and the first dummy word line;
the control circuit is configured to lower the first dummy word line to a first resting voltage at a conclusion of the pre-charging prior to lowering the first plurality of data word lines to one or more resting voltages at the conclusion of the pre-charging.