US 12,112,785 B2
Apparatuses, systems, and methods for configurable memory
Angelo Visconti, Appiano Gentile (IT); and Giorgio Servalli, Fara Gera d'Adda (IT)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by MICRON TECHNOLOGY, INC., Boise, ID (US)
Filed on Apr. 29, 2022, as Appl. No. 17/732,885.
Prior Publication US 2023/0352073 A1, Nov. 2, 2023
Int. Cl. G11C 11/22 (2006.01)
CPC G11C 11/2255 (2013.01) [G11C 11/221 (2013.01); G11C 11/2273 (2013.01)] 33 Claims
OG exemplary drawing
 
1. An apparatus comprising:
a memory array;
at least one configuration device configured to arrange a first portion of the memory array in a first arrangement and arrange a second portion of the memory array in a second arrangement different than the first arrangement, wherein the first arrangement and the second arrangement are based, at least in part, on an arrangement command, wherein the first and second portions of the memory array each comprise a plurality of memory cells and at least one sense amplifier; and
a reference potential line, and wherein the at least one configuration device connects one memory cell of the plurality of memory cells to a first input of the at least one sense amplifier and further connects the reference potential line to a second input of the at least one sense amplifier in the first arrangement.