US 12,112,250 B2
Lossless tiling in convolution networks—resetting overlap factor to zero at section boundaries
Tejas Nagendra Babu Nama, Sunnyvale, CA (US); Ruddhi Chaphekar, Santa Clara, CA (US); Ram Sivaramakrishnan, San Jose, CA (US); Raghu Prabhakar, San Jose, CA (US); Sumti Jairath, Santa Clara, CA (US); Junjue Wang, San Mateo, CA (US); Kaizhao Liang, Palo Alto, CA (US); Adi Fuchs, West Windsor, NJ (US); Matheen Musaddiq, Austin, TX (US); and Arvind Krishna Sujeeth, San Francisco, CA (US)
Assigned to SambaNova Systems, Inc., Palo Alto, CA (US)
Filed by SambaNova Systems, Inc., Palo Alto, CA (US)
Filed on Apr. 4, 2022, as Appl. No. 17/713,157.
Application 17/364,110 is a division of application No. 17/216,651, filed on Mar. 29, 2021, granted, now 11,195,080, issued on Dec. 7, 2021.
Application 17/713,157 is a continuation of application No. 17/364,110, filed on Jun. 30, 2021, granted, now 11,995,529.
Prior Publication US 2022/0309325 A1, Sep. 29, 2022
Int. Cl. G06N 3/04 (2023.01)
CPC G06N 3/04 (2013.01) 19 Claims
OG exemplary drawing
 
1. A data processing system, comprising one or more processors coupled to a storage medium and compile time logic stored in the storage medium and executable in any of the one or more processors, the compile time logic configured to:
section a graph into a sequence of sections, the sequence of sections including a first section followed by a second section,
configure the first section to generate a first output in a first non-overlapping target configuration in response to processing an input in a first overlapping input configuration, and
configure the second section to generate a second output in a second non-overlapping target configuration in response to processing the first output in a second overlapping input configuration, wherein the second non-overlapping target configuration is different than the first non-overlapping target configuration; and
create a set of computer instructions to execute the first section and the second section on a target processing system, wherein the first output is generated by using tiles in the input as effective receptive fields, and wherein the compile time logic is further configured to reverse traverse the first section to determine the first overlapping input configuration as effective receptive fields of tiles in the input that satisfy the first non-overlapping target configuration.