US 12,112,197 B2
Processor with hardware pipeline
Michael John Livesley, Hertfordshire (GB); Ian King, Hertfordshire (GB); and Alistair Goudie, Hertfordshire (GB)
Assigned to Imagination Technologies Limited, Kings Langley (GB)
Filed by Imagination Technologies Limited, Kings Langley (GB)
Filed on Sep. 27, 2022, as Appl. No. 17/953,821.
Claims priority of application No. 2113979 (GB), filed on Sep. 30, 2021.
Prior Publication US 2023/0120307 A1, Apr. 20, 2023
Int. Cl. G06F 9/48 (2006.01); G06F 9/46 (2006.01)
CPC G06F 9/4881 (2013.01) [G06F 9/462 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A processor comprising:
execution logic comprising one or more execution units for running software;
a hardware pipeline comprising fixed-function hardware; and
a register bank to which the software can write descriptors specifying tasks to be processed by the hardware pipeline; wherein the register bank comprises a plurality of register sets, each for holding one of the descriptors of one of the tasks at any one time;
the processor comprises a first selector operable to connect the execution logic to a selected one of the register sets at any one time, and thereby enable the software to write successive ones of said descriptors to different ones of said register sets;
the processor comprises a second selector operable to connect the hardware pipeline to a selected one of the register sets at any one time; and
the processor further comprises control circuitry configured to control the hardware pipeline to begin processing a current one of said tasks based on the descriptor in a current register set of the register sets while the software is writing the descriptor of another of said tasks to another of the register sets, the current register set being that currently connected to the hardware pipeline by the second selector.