US 12,112,196 B2
Real-time scheduling for a heterogeneous multi-core system
Guy Drory, Givataim (IL); and Gilboa Shveki, Shoham (IL)
Assigned to GM GLOBAL TECHNOLOGY OPERATIONS LLC, Detroit, MI (US)
Filed by GM Global Technology Operations LLC, Detroit, MI (US)
Filed on Apr. 26, 2021, as Appl. No. 17/240,106.
Prior Publication US 2022/0342702 A1, Oct. 27, 2022
Int. Cl. G06F 9/48 (2006.01); G06F 9/38 (2018.01); G06F 9/50 (2006.01); G06F 9/54 (2006.01); G06F 15/78 (2006.01)
CPC G06F 9/4881 (2013.01) [G06F 9/3867 (2013.01); G06F 9/5027 (2013.01); G06F 9/544 (2013.01); G06F 15/7807 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A heterogeneous multi-core system that executes a real-time system for an automobile, the heterogeneous multi-core system comprising:
a plurality of system-on chips in electronic communication with one another, wherein each system-on-chip includes a plurality of central processing units (CPUs) arranged into a plurality of logical domains;
a plurality of scheduled tasks that are executed based on an execution pipeline and each execute a specific set of tasks for one of the logical domains, wherein the plurality of scheduled tasks includes:
at least one offset scheduled task that is executed at an offset time, wherein the offset time for the at least one offset scheduled task is determined by selecting a predefined percentage of a total runtime of cases that are executed to completion; and
a reference scheduled task located at an execution stage upstream in the execution pipeline relative to the offset scheduled task, wherein the reference scheduled task communicates data to the offset scheduled task and the offset time represents a period of time measured relative to the reference scheduled task, and wherein each stage of the execution pipeline of the real-time system includes a guaranteed latency that is based on the offset time of the at least one offset scheduled task.