a coprocessor time counter storing a coprocessor time count representing a current time of the coprocessor, the coprocessor time count being independent of the processor time count, the coprocessor time count being incremented periodically and being frozen in response to a delay in execution of the first committed coprocessor instruction, and resuming incrementing upon completion of the delay in execution, wherein the coprocessor time counter comprises a coprocessor N-bit counter which counts from a zero count to a largest count value, which represents a largest future time to dispatch the first committed coprocessor instruction and wherein the coprocessor N-bit counter returns to the zero count after reaching the largest count value;

a vector register scoreboard storing a first write time of a first vector register in a vector register file, wherein the first write time represents a first future time relative to the coprocessor time count;

a coprocessor issue unit coupled to the coprocessor time counter for receiving the first committed coprocessor instruction from the processor, and issuing the first committed coprocessor instruction with a preset coprocessor execution time based on the coprocessor time count;

a coprocessor functional unit that operates in accordance with the coprocessor time count and freezes the coprocessor time count in response to the delay in execution of the first committed coprocessor instruction and unfreezes the coprocessor time count when the delay in execution completes; and

a coprocessor execution queue coupled to the coprocessor time counter and the coprocessor issue unit to receive the first committed coprocessor instruction from the coprocessor issue unit and dispatch the first committed coprocessor instruction to the coprocessor functional unit based upon the coprocessor time count;

wherein the delay in execution of the first committed coprocessor instruction occurs when result data are not valid at the preset coprocessor execution time or read data from the vector register file are not accepted by the coprocessor functional unit; and

wherein the coprocessor time counter is unfrozen when the result data are valid or the read data are accepted by the coprocessor functional unit;

wherein the coprocessor functional unit further comprises a latency counter which is set to equal a latency time of a corresponding coprocessor instruction when the corresponding coprocessor instruction is received by the coprocessor functional unit, the latency counter causing result data of the corresponding coprocessor instruction to be written back to a corresponding vector register of the vector register file upon counting down to zero; and

wherein the coprocessor further comprises an alternative time counter and, when the coprocessor time counter is frozen and the latency counter is not zero, the alternative time counter continues incrementing from the frozen time count to generate an alternative time count, wherein the alternative time count generated by the alternative time counter is used for counting down the latency counter to write back the result data of the corresponding coprocessor instruction to the corresponding vector register of the vector register file from the coprocessor functional unit.