US 12,112,069 B2
Memory module and computing device containing the memory module
John Michael Smolka, Felton, CA (US); and Carlos Rene Weissenberg, Placerville, CA (US)
Assigned to AI Plus, Inc., San Jose, CA (US)
Filed by AI Plus, Inc., San Jose, CA (US)
Filed on Dec. 13, 2022, as Appl. No. 18/080,720.
Application 18/080,720 is a continuation of application No. 16/906,876, filed on Jun. 19, 2020, granted, now 11,526,302.
Claims priority of provisional application 62/864,248, filed on Jun. 20, 2019.
Prior Publication US 2023/0113337 A1, Apr. 13, 2023
Int. Cl. G06F 3/06 (2006.01)
CPC G06F 3/0659 (2013.01) [G06F 3/0604 (2013.01); G06F 3/0634 (2013.01); G06F 3/0653 (2013.01); G06F 3/0679 (2013.01)] 22 Claims
OG exemplary drawing
 
1. A method, comprising:
communicating, by a processor in a memory module, with an external Central Processing Unit (CPU) via a communications interface;
receiving, by the processor, data from the external CPU;
storing, by the processor, the data in one or more dynamic random-access memories (DRAMs);
instructing, by the processor, one or more multiplexers in the memory module to restrict external CPU write and read accesses to the one or more DRAMs;
performing, by the processor, one or more operations on the data stored in the one or more DRAMs;
writing, by the processor, results from the one or more operations into the one or more DRAMs;
instructing, by the processor, the one or more multiplexers to allow external CPU write and read accesses to the one or more DRAMs;
communicating, by the processor, to the external CPU that the results are located in the one or more DRAMs.