US 12,112,066 B2
Techniques for firmware enhancement in memory devices
Zhengbo Wang, Shanghai (CN); Jia Sun, Shanghai (CN); and Ming Ma, Shanghai (CN)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on Jul. 14, 2022, as Appl. No. 17/812,609.
Prior Publication US 2024/0020053 A1, Jan. 18, 2024
Int. Cl. G06F 3/06 (2006.01); G06F 12/06 (2006.01)
CPC G06F 3/0659 (2013.01) [G06F 3/0604 (2013.01); G06F 3/0679 (2013.01); G06F 12/063 (2013.01); G06F 2212/7201 (2013.01)] 25 Claims
OG exemplary drawing
 
1. A memory system, comprising:
a non-volatile memory device;
a volatile memory device; and
one or more controllers coupled with the non-volatile memory device and the volatile memory device and configured to cause the memory system to:
store data in the non-volatile memory device, the non-volatile memory device comprising a first area configured to store a node address mapping and a second area;
receive, at the memory system, a command to transfer a portion of the node address mapping from the non-volatile memory device to the volatile memory device that is associated with firmware of the memory system, the node address mapping comprising data indicating a range of address mappings associated with identifying data in node blocks of the second area; and
transmit, from the memory system, a response to the command indicating a status associated with transferring the portion of the node address mapping from the non-volatile memory device to the volatile memory device.