US 12,112,065 B2
Techniques for detection of shutdown patterns
Roberto Izzi, Caserta (IT); Luca Porzio, Casalnuovo (IT); and Marco Onorato, Villasanta (IT)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on May 24, 2022, as Appl. No. 17/752,354.
Prior Publication US 2023/0384972 A1, Nov. 30, 2023
Int. Cl. G06F 3/06 (2006.01)
CPC G06F 3/0659 (2013.01) [G06F 3/0619 (2013.01); G06F 3/0679 (2013.01)] 23 Claims
OG exemplary drawing
 
1. A memory system, comprising:
one or more memory devices; and
processing circuitry coupled with the one or more memory devices and configured to cause the memory system to:
receive, by the one or more memory devices, a plurality of commands from a host device, the plurality of commands comprising a first quantity of commands;
compare the first quantity of commands to a threshold associated with a pattern of the received plurality of commands;
determine whether the plurality of commands are associated with a shutdown procedure based at least in part on the first quantity of commands satisfying the threshold associated with the pattern;
initiate one or more operations associated with the shutdown procedure based at least in part on identifying that the plurality of commands are associated with the shutdown procedure; and
receive a shutdown command for the shutdown procedure after initiating the one or more operations associated with the shutdown procedure.