| CPC G06F 3/0619 (2013.01) [G06F 1/32 (2013.01); G06F 3/0632 (2013.01); G06F 3/0656 (2013.01); G06F 3/0659 (2013.01); G06F 3/0673 (2013.01)] | 20 Claims |
|
1. A storage device comprising:
a nonvolatile memory device; and
a storage controller configured to control operations of the nonvolatile memory device, the storage controller comprising:
a buffer memory configured to temporarily store read data read from the nonvolatile memory device and write data to be written in the nonvolatile memory device;
a first volatile memory and a second volatile memory included in different power domains;
a processor configured to generate buffer allocation information on storage regions of the buffer memory and data stored in the storage regions, store the buffer allocation information in the first volatile memory, and control an access to the buffer memory based on the buffer allocation information; and
a buffer context backup circuit configured to perform a context backup operation to read the buffer allocation information from the first volatile memory and store backup information in the second volatile memory when the storage device enters a power down mode, and to perform a context restoring operation to read the backup information from the second volatile memory and store the buffer allocation information in the first volatile memory when the storage device exits from the power down mode,
wherein the first volatile memory is included in the processor or the first volatile memory is a tightly coupled memory that is directly connected to the processor without passing through a system bus of the storage device,
wherein the second volatile memory is directly connected to the buffer context backup circuit without passing through the system bus.
|