US 12,111,727 B2
Apparatuses, systems, and methods for forced error check and scrub readouts
Sujeet Ayyapureddi, Boise, ID (US)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by MICRON TECHNOLOGY, INC., Boise, ID (US)
Filed on Feb. 10, 2023, as Appl. No. 18/167,768.
Application 18/167,768 is a continuation of application No. 17/375,957, filed on Jul. 14, 2021, granted, now 11,579,971.
Prior Publication US 2023/0185665 A1, Jun. 15, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. G06F 11/10 (2006.01); G11C 11/406 (2006.01); G11C 11/4063 (2006.01)
CPC G06F 11/1068 (2013.01) [G11C 11/40615 (2013.01); G11C 11/4063 (2013.01)] 20 Claims
OG exemplary drawing
 
16. A method comprising:
providing a multi-purpose command to a memory; and
forcing an update of a register value of an error check and scrub (ECS) register based at least in part on the multi-purpose command, the forcing of the update of the register value occurring regardless of a status of an ECS cycle.