US 12,111,351 B2
Test devices, test systems, and operating methods of test systems
Ungjin Jang, Cheonan-si (KR); Seonggwon Jang, Asan-si (KR); Yongjeong Kim, Cheonan-si (KR); and Sooyong Park, Asan-si (KR)
Assigned to Samsung Electronics Co., Ltd., Gyeonggi-do (KR)
Filed by Samsung Electronics Co., Ltd., Suwon-si (KR)
Filed on Nov. 9, 2021, as Appl. No. 17/522,188.
Claims priority of application No. 10-2020-0168723 (KR), filed on Dec. 4, 2020.
Prior Publication US 2022/0178997 A1, Jun. 9, 2022
Int. Cl. G11C 29/56 (2006.01); G01R 31/317 (2006.01); G01R 31/319 (2006.01); G11C 29/08 (2006.01)
CPC G01R 31/31702 (2013.01) [G01R 31/31905 (2013.01); G11C 29/08 (2013.01); G11C 29/56 (2013.01); G11C 2029/5602 (2013.01)] 19 Claims
OG exemplary drawing
 
1. A test device configured to test a device under test (DUT) performing an interface of a pulse amplitude modulation (PAM) operation, the test device comprising:
a logic generation/determination device configured to generate multiple bits corresponding to a test pattern;
a first driver configured to generate a first non return to zero (NRZ) signal according to a logic state of a first bit among the multiple bits and output the generated first NRZ signal via a first channel; and
a second driver configured to generate a second NRZ signal according to a logic state of a second bit among the multiple bits and output the generated second NRZ signal via a second channel,
wherein the first NRZ signal has a first high level or a first low level according to the logic state of the first bit, and the second NRZ signal has a second high level or a second low level according to the logic state of the second bit,
wherein the first high level is different from the second high level, and
wherein the first NRZ signal and the second NRZ signal are voltage-superposed via a superposition line formed on a test board, and provided as a test signal to the DUT, and the test signal has a voltage level satisfying a PAM-4 operation.