US 11,784,786 B2
Mitigating security vulnerabilities with memory allocation markers in cryptographic computing systems
Sergej Deutsch, Hillsboro, OR (US); David M. Durham, Beaverton, OR (US); Karanvir S. Grewal, Hillsboro, OR (US); Michael D. LeMay, Hillsboro, OR (US); and Michael E. Kounavis, Portland, OR (US)
Assigned to Intel Corporation, Santa Clara, CA (US)
Filed by Intel Corporation, Santa Clara, CA (US)
Filed on Mar. 26, 2021, as Appl. No. 17/214,222.
Claims priority of provisional application 63/065,840, filed on Aug. 14, 2020.
Prior Publication US 2021/0240638 A1, Aug. 5, 2021
Int. Cl. G06F 9/50 (2006.01); G06F 12/121 (2016.01); G06F 12/14 (2006.01); H04L 9/06 (2006.01); H04L 9/08 (2006.01); H04L 9/32 (2006.01)
CPC H04L 9/0618 (2013.01) [G06F 9/5016 (2013.01); G06F 12/121 (2013.01); G06F 12/1408 (2013.01); G06F 12/1441 (2013.01); G06F 12/1458 (2013.01); G06F 2212/7207 (2013.01)] 25 Claims
OG exemplary drawing
 
1. A processor, comprising:
a register to store a first encoded pointer for a first memory allocation for an application; and
circuitry coupled to a memory, the circuitry to:
determine a first memory address of a first marker region in the first memory allocation;
obtain current data from the first marker region at the first memory address;
compare the current data to a reference marker stored separately from the first memory allocation;
determine that the first memory allocation is in a first state based on a determination that the current data corresponds to the reference marker; and
based on the first memory allocation being in the first state, prevent access to contents currently stored in the first memory allocation.