US 11,783,032 B2
Systems and methods for protecting cache and main-memory from flush-based attacks
Moinuddin Qureshi, Atlanta, GA (US)
Assigned to Georgia Tech Research Corporation, Atlanta, GA (US)
Appl. No. 17/276,773
Filed by Georgia Tech Research Corporation, Atlanta, GA (US)
PCT Filed Sep. 17, 2019, PCT No. PCT/US2019/051393
§ 371(c)(1), (2) Date Mar. 16, 2021,
PCT Pub. No. WO2020/060965, PCT Pub. Date Mar. 26, 2020.
Claims priority of provisional application 62/732,188, filed on Sep. 17, 2018.
Prior Publication US 2021/0349995 A1, Nov. 11, 2021
Int. Cl. G06F 21/55 (2013.01); G06F 12/0802 (2016.01); G06F 12/0891 (2016.01)
CPC G06F 21/554 (2013.01) [G06F 12/0802 (2013.01); G06F 12/0891 (2013.01); G06F 2212/1052 (2013.01); G06F 2221/034 (2013.01)] 25 Claims
OG exemplary drawing
 
1. A method comprising:
receiving a flush-caused invalidation at a cache line of a cache;
in response to receiving the flush-caused invalidation:
marking a valid bit of the cache line as invalid, wherein in an initial state prior to receiving the flush-caused invalidation, the valid bit was marked valid; and
marking a zombie bit of the cache line as valid, wherein in the initial state the zombie bit was marked invalid, and wherein marking the zombie bit as valid identifies the cache line is an invalid zombie line;
receiving a first access request at the invalid zombie line;
receiving second data from a memory;
in response to receiving the second data, either:
when the second data is different than cache data of the cache line, marking the valid bit as valid and marking the zombie bit as invalid; or
when the second data is equal to the cache data, marking the valid bit as valid, thereby creating a valid zombie line;
receiving a second access request at the valid zombie line; and
identifying the valid zombie line as under attack.