US 11,782,856 B2
Compile time instrumentation of data flow graphs
Raghu Prabhakar, San Jose, CA (US); Matthew Thomas Grimm, Boise, ID (US); Sumti Jairath, Santa Clara, CA (US); Kin Hing Leung, Cupertino, CA (US); Sitanshu Gupta, San Jose, CA (US); Yuan Lin, Campbell, CA (US); and Luca Boasso, Austin, TX (US)
Assigned to SambaNova Systems, Inc., Palo Alto, CA (US)
Filed by SambaNova Systems, Inc., Palo Alto, CA (US)
Filed on Sep. 20, 2021, as Appl. No. 17/479,861.
Application 17/479,861 is a continuation of application No. 17/175,289, filed on Feb. 12, 2021, granted, now 11,126,574.
Prior Publication US 2022/0261364 A1, Aug. 18, 2022
Int. Cl. G06F 13/20 (2006.01); G06F 15/78 (2006.01)
CPC G06F 13/20 (2013.01) [G06F 15/7867 (2013.01)] 15 Claims
OG exemplary drawing
 
1. A data processing system, comprising:
memory storing a dataflow graph for an application, the dataflow graph having a plurality of compute nodes, wherein compute nodes in the plurality of compute nodes are configured to be producers to produce data for execution of the application, and to be consumers to consume the data for execution of the application;
compile time logic configured to partition execution of the dataflow graph into stages, wherein each of the stages has one or more compute nodes, one or more producers, and one or more consumers;
runtime logic configured with the compile time logic to determine a processing latency for each of the stages by calculating time elapsed between producers of a particular stage receiving input data and consumers of the particular stage receiving output data, wherein the output data is generated by compute nodes of the particular stage based on processing the input data; and
instrumentation profiling logic configured to generate performance statistics for the dataflow graph based on the processing latency determined for each of the stages.