US 12,439,826 B2
Integrated MEMS resonator and method
Mohamed A Abdelmoneum, Portland, OR (US); Eduardo Alban, Hillsboro, OR (US); Whitney Bryks, Chandler, AZ (US); Brent R. Carlton, Portland, OR (US); Tarek A. Ibrahim, Mesa, AZ (US); Nasser A. Kurd, Portland, OR (US); Jason Mix, Portland, OR (US); Srinivas Venkata Ramanuja Pietambaram, Chandler, AZ (US); and Sarah Shahraini, Santa Clara, CA (US)
Assigned to Intel Corporation, Santa Clara, CA (US)
Filed by Intel Corporation, Santa Clara, CA (US)
Filed on Sep. 22, 2021, as Appl. No. 17/482,056.
Prior Publication US 2023/0085673 A1, Mar. 23, 2023
Int. Cl. H01L 41/047 (2006.01); B81B 3/00 (2006.01); H03H 9/02 (2006.01); H10N 30/09 (2023.01); H10N 30/20 (2023.01); H10N 30/853 (2023.01)
CPC H10N 30/853 (2023.02) [B81B 3/0018 (2013.01); H03H 9/02244 (2013.01); H10N 30/09 (2023.02); H10N 30/20 (2023.02); B81B 2201/0271 (2013.01)] 21 Claims
OG exemplary drawing
 
1. An electronic device, comprising:
a processor die coupled to a substrate;
a microelectromechanical systems (MEMS) resonator die located within the substrate, and below the processor die; and
one or more first vias coupled between the processor die and the MEMS resonator die, the one or more first vias passing through a portion of the substrate; and
one or more second vias coupled between the processor die and a backside of the substrate, below the MEMS resonator die.