| CPC H10K 59/131 (2023.02) [G09G 3/3233 (2013.01); H10K 59/1201 (2023.02); H10K 59/124 (2023.02); G09G 2300/0819 (2013.01); G09G 2300/0842 (2013.01); G09G 2310/08 (2013.01)] | 12 Claims |

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1. A display substrate, wherein on a plane perpendicular to the display substrate, the display substrate comprises a base substrate, a buffer layer disposed on the base substrate, a semiconductor layer disposed on the buffer layer, a first insulating layer overlying the semiconductor layer, a first gate metal layer disposed on the first insulating layer, a second insulating layer overlying the first gate metal layer, a second gate metal layer disposed on the second insulating layer, a third insulating layer overlying the second gate metal layer, a first source-drain metal layer disposed on the third insulating layer, and a planarization layer overlying the first source-drain metal layer;
at least one of the first gate metal layer and the second gate metal layer comprises a first power supply line extending in a first direction, and the first source-drain metal layer comprises a data line extending in a second direction, wherein the first direction intersects the second direction.
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