US 12,439,776 B2
Display panel and display device
Hongwei Tian, Beijing (CN); Yanan Niu, Beijing (CN); Zheng Liu, Beijing (CN); Liangjian Li, Beijing (CN); Dong Li, Beijing (CN); Meng Zhao, Beijing (CN); Long Han, Beijing (CN); and Can Zheng, Beijing (CN)
Assigned to BOE TECHNOLOGY GROUP CO., LTD., Beijing (CN)
Filed by BOE TECHNOLOGY GROUP CO., LTD., Beijing (CN)
Filed on Jul. 13, 2023, as Appl. No. 18/221,420.
Application 18/221,420 is a continuation of application No. 16/624,286, granted, now 11,751,442, previously published as PCT/CN2019/083516, filed on Apr. 19, 2019.
Claims priority of application No. 201810384797.8 (CN), filed on Apr. 26, 2018.
Prior Publication US 2023/0363220 A1, Nov. 9, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. H10K 59/121 (2023.01); G09G 3/3266 (2016.01); G09G 3/3275 (2016.01); H10D 86/01 (2025.01); H10D 86/40 (2025.01); H10D 86/60 (2025.01); H10K 59/12 (2023.01); H10K 59/124 (2023.01); H10K 59/131 (2023.01); H10K 59/80 (2023.01); H10K 77/10 (2023.01); H10K 102/00 (2023.01)
CPC H10K 59/1213 (2023.02) [G09G 3/3266 (2013.01); G09G 3/3275 (2013.01); H10K 59/124 (2023.02); H10K 59/131 (2023.02); H10K 77/111 (2023.02); H10D 86/0231 (2025.01); H10D 86/411 (2025.01); H10D 86/441 (2025.01); H10D 86/451 (2025.01); H10D 86/60 (2025.01); H10K 59/1201 (2023.02); H10K 59/8731 (2023.02); H10K 2102/311 (2023.02); Y02E 10/549 (2013.01)] 11 Claims
OG exemplary drawing
 
1. A display panel, comprising:
a display area and a base substrate;
a driving circuit disposed on the base substrate, and comprising a plurality of transistors;
at least one signal line on the base substrate; and
at least one insulating layer between the driving circuit and the at least one signal line, wherein an orthogonal projection of the at least one signal line on the base substrate has an overlapping area with an orthogonal projection of the driving circuit on the base substrate;
wherein the at least one signal line is at least one electrode power supply line, and the at least one electrode power supply line comprises at least one first opening, and an area of an orthogonal projection of each opening of the at least one first opening on the base substrate, is larger than an area of an orthogonal projection of a group of transistors among the plurality of transistors on the base substrate, the group of transistors comprises at least two transistors, and an overlapping area, between an orthogonal projection of an non-opening area of the at least one electrode power supply line on the base substrate and an orthogonal projection of any transistor on the base substrate, is zero;
wherein the driving circuit comprises a plurality of metal traces;
the at least one electrode power supply line further comprises at least one second opening, and when the at least one second opening comprises a plurality of openings, one or more openings among the plurality of openings correspond to a same metal trace; and wherein
an overlapping area, of orthographic projections of the one or more openings on the base substrate and an orthographic projection of the same metal trace on the base substrate, is a first area, an area of the orthographic projection of the same metal trace on the base substrate is a second area, and the first area is at least 20% of the second area.