US 12,439,715 B2
Image sensor package and system having the same
Sunjae Kim, Seoul (KR); Chungho Song, Suwon-si (KR); and Yonghoe Cho, Cheonan-si (KR)
Assigned to Samsung Electronics Co., Ltd., Suwon-si (KR)
Filed by Samsung Electronics Co., Ltd., Suwon-si (KR)
Filed on Apr. 25, 2022, as Appl. No. 17/728,275.
Claims priority of application No. 10-2021-0125206 (KR), filed on Sep. 17, 2021.
Prior Publication US 2023/0085734 A1, Mar. 23, 2023
Int. Cl. H10F 39/00 (2025.01); H01L 23/00 (2006.01); H04N 23/51 (2023.01); H04N 23/54 (2023.01); H04N 23/55 (2023.01); H10F 39/18 (2025.01)
CPC H10F 39/804 (2025.01) [H01L 24/05 (2013.01); H01L 24/13 (2013.01); H01L 24/16 (2013.01); H10F 39/811 (2025.01); H01L 24/26 (2013.01); H01L 24/29 (2013.01); H01L 24/33 (2013.01); H01L 24/73 (2013.01); H01L 24/81 (2013.01); H01L 24/92 (2013.01); H01L 24/97 (2013.01); H01L 2224/05571 (2013.01); H01L 2224/05573 (2013.01); H01L 2224/13005 (2013.01); H01L 2224/13023 (2013.01); H01L 2224/16227 (2013.01); H01L 2224/26145 (2013.01); H01L 2224/2919 (2013.01); H01L 2224/33181 (2013.01); H01L 2224/33183 (2013.01); H01L 2224/73153 (2013.01); H01L 2224/73204 (2013.01); H01L 2224/81191 (2013.01); H01L 2224/92125 (2013.01); H01L 2224/92143 (2013.01); H01L 2224/97 (2013.01); H04N 23/51 (2023.01); H04N 23/54 (2023.01); H04N 23/55 (2023.01); H10F 39/182 (2025.01); H10F 39/8063 (2025.01)] 18 Claims
OG exemplary drawing
 
1. An image sensor package comprising:
a package base substrate having a cavity that extends inwards from an upper surface thereof, and the package base substrate including a plurality of upper surface connection pads and a plurality of lower surface connection pads electrically connected to each other;
an image sensor chip in the cavity, and the image sensor chip including a chip body having a first surface and a second surface that face away from each other, a sensor unit in the first surface of the chip body, and a plurality of chip pads around the sensor unit in the first surface of the chip body;
a filter glass above the image sensor chip, and the filter glass including a transparent substrate and a plurality of redistribution patterns on a lower surface of the transparent substrate;
a plurality of connection terminals between the plurality of redistribution patterns and the plurality of chip pads, and between the plurality of redistribution patterns and the plurality of upper surface connection pads to electrically connect the plurality of chip pads to the plurality of upper surface connection pads;
an encapsulant configured to fill a space between the package base substrate and the filter glass, and surround the plurality of connection terminals; and
a dam structure between the chip body and the transparent substrate and between the sensor unit and the encapsulant.