US 12,439,701 B2
Power cell for semiconductor devices
Chung-Chieh Yang, Hsinchu (TW); Chung-Ting Lu, Hsinchu (TW); and Yung-Chow Peng, Hsinchu (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed by TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed on Feb. 26, 2024, as Appl. No. 18/586,918.
Application 18/586,918 is a continuation of application No. 17/864,365, filed on Jul. 13, 2022, granted, now 11,929,360.
Application 17/864,365 is a continuation of application No. 17/075,968, filed on Oct. 21, 2020, granted, now 11,410,986, issued on Aug. 9, 2022.
Prior Publication US 2024/0194664 A1, Jun. 13, 2024
Int. Cl. H10D 89/10 (2025.01); H01L 21/768 (2006.01); H01L 23/522 (2006.01); H10D 84/01 (2025.01); H10D 84/03 (2025.01)
CPC H10D 89/10 (2025.01) [H01L 21/76885 (2013.01); H01L 23/5226 (2013.01); H10D 84/0186 (2025.01); H10D 84/038 (2025.01)] 20 Claims
OG exemplary drawing
 
1. A device, comprising:
an electrical circuit;
a first conductive pillar over a first side of a substrate;
a first conductive rail electrically connected to the first conductive pillar, wherein the electrical circuit is electrically connected to the first conductive rail by the first conductive pillar; and
a power pillar extending through the substrate, wherein the power pillar is electrically connected to the first conductive rail, wherein the power pillar comprises a plurality of vias, and adjacent vias of the plurality of vias are offset from one another in a direction parallel to a surface of the first side of the substrate.