| CPC H10D 86/0221 (2025.01) [H10D 30/6755 (2025.01); H10D 86/423 (2025.01); H01L 25/167 (2013.01)] | 7 Claims |
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1. A manufacturing method of an array substrate, comprising following steps:
providing a substrate and forming a semiconductor layer on the substrate,
wherein the semiconductor layer comprises a first region, and a second region and a third region located on two sides of the first region, and a material of the semiconductor layer is a semiconductor oxide;
forming a gate insulation layer on a side of the semiconductor layer away from the substrate, wherein the gate insulation layer covers the first region;
forming a gate electrode on the gate insulation layer,
wherein the gate electrode and the gate insulation layer are disposed correspondingly;
forming an oxide material layer on the gate electrode, wherein the oxide material layer covers the semiconductor layer, the gate insulation layer, and the gate electrode, the oxide material layer is directly connected to the second region and the third region to obtain a semiconductor substrate, and the oxide material layer comprises aluminum atoms; and
heating the semiconductor substrate, wherein the oxide material layer captures oxygen in the second region and the third region to form an oxide layer, the second region is conductorized to form a source electrode region, and the third region is conductorized to form a drain electrode region.
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